000 -LEADER |
fixed length control field |
00750nam a22002297a 4500 |
001 - CONTROL NUMBER |
control field |
16640 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
BD-DhUAP |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20200116095334.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
200113r20102008 a|||| |||| 001 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
0070667241 |
040 ## - CATALOGING SOURCE |
Original cataloging agency |
0070667241 |
Language of cataloging |
Eng |
Transcribing agency |
0070667241 |
Modifying agency |
BD-DhUAP |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER |
Edition number |
23 |
Classification number |
004.22 BRO |
100 ## - MAIN ENTRY--PERSONAL NAME |
Personal name |
Brown, Stephen. |
245 ## - TITLE STATEMENT |
Title |
Fundamentals of digital logic with verilog design / |
Statement of responsibility, etc. |
Stephen Brown and Zvonko Vranesic. |
250 ## - EDITION STATEMENT |
Edition statement |
2nd ed. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. |
Place of publication, distribution, etc. |
New Delhi : |
Name of publisher, distributor, etc. |
Tata McGraw hill education, |
Date of publication, distribution, etc. |
c2008 [Reprinted 2010]. |
300 ## - PHYSICAL DESCRIPTION |
Extent |
xviii, 865 pages : |
Other physical details |
illustrations ; |
Dimensions |
24 cm. |
500 ## - GENERAL NOTE |
General note |
Includes index. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
Logic circuits |
Form subdivision |
Design and construction |
General subdivision |
Data processing. |
700 ## - ADDED ENTRY--PERSONAL NAME |
Personal name |
Vranesic, Zvonko. |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
|
Koha item type |
Book |