Palnitkar, Samir. <br/><br/>
Verilog HDL :  a guide to digital design and synthesis / 
Samir Palnitkar. 
 - 2nd ed. 
 - New Delhi :  Pearson,  c2003 [2008]. 
 - xlii, 450 pages :  illustrations ;  25 cm.  
<br/><br/>Includes bibliographical references and index. 
<br/><br/><label>ISBN: </label>9788177589184 
<br/><br/><label>LCCN: </label>2003269714 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Verilog (Computer hardware description language).
<br/><br/><label>Dewey Class. No.: </label>621.392 PAL